AMD Zen 6 could give X3D CPUs up to 240MB of cache

AMD is seemingly capable of drastically increasing the cache capacity of its upcoming Zen 6 chips using stacked 3D V-Cache layers.

AMD is reportedly bringing some big changes with its next-gen Zen 6 architecture, offering more cores and cache per CCD (Core Complex Die). The brand is seemingly capable of stacking its 3D V-Cache layers to boost the total available L3 pool, which could drastically boost performance in cache-sensitive tasks. Upcoming Ryzen CPUs are getting more exciting with each new rumour.

According to Moore’s Law Is Dead (MLID) on YouTube, AMD has boosted the amount of cache on each 3D V-Cache layer to 96MB, up from 64MB on Zen 5. The brand is also planning a redesign of its chiplets, packing up to 12 cores inside each, giving access to up to 24 cores on consumer desktops and laptops. This should allow Team Red to offer single-CCD Ryzen CPUs with 144MB of L3 cache in total, comprised of 48MB (4MB per core) inside the CCD and 96MB on the 3D layer.

On top of that, AMD is seemingly able to stack two of these 3D V-Cache layers, bringing the L3 total to 240MB (96 + 96 + 48). Note however, that these 2-Hi X3D variants may be exclusive to the professional segment (Threadripper / Epyc), especially if in-house testing doesn’t show a lot of benefits for regular users and gamers. What is sure according to the source, is that AMD is definitely capable of launching a gaming chip with 240MB of L3 cache. Perhaps the best option is to let users choose for themselves by launching regular Zen 6 processors alongside single and dual-layer 3D V-Cache variants.

MILD sources inside AMD have also indicated that the brand expects Zen 6 to deliver between 6% and 8% FP IPC (Floating Point Instructions Per Cycle) uplift compared to Zen 5. That said, this IPC isn’t final yet as it doesn’t take into account Zen 6’s gaming capabilities and PPC (Performance Per Clock) uplifts. MLID compared the rumoured IPC uplift of Zen 6 to that brought by Zen 4. The take here is that this FP IPC isn’t to be confused with the overall gen-to-gen improvement which is likely to be higher.

Aside from these big changes, Zen 6 is also set to debut a new bridge-die interconnect which is said to reduce the latency of chiplet-to-chiplet communication, potentially enhancing it to a level where dual-CCD CPUs are no longer an issue for games. There will also be a new I/O die that could boost DDR5 support even higher. Considering all of this, Zen 6 is shaping up to be a great option for gamers, and we can’t wait to try it.

Fahd Temsamani
Fahd Temsamani
Senior Writer at Club386, his love for computers began with an IBM running MS-DOS, and he’s been pushing the limits of technology ever since. Known for his overclocking prowess, Fahd once unlocked an extra 1.1GHz from a humble Pentium E5300 - a feat that cemented his reputation as a master tinkerer. Fluent in English, Arabic, and French, his motto when building a new rig is ‘il ne faut rien laisser au hasard.’

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