An image of an what’s purported to be an Intel Nova Lake-H mobile processor has surfaced, revealing its multi-tile design and size. Part of the upcoming Core Ultra 4000 series, this chip reportedly packs 16 CPU cores alongside four GPU cores.
While we have seen an annotated Nova Lake-H processor image in a previous leak, this is the first time we’ve had a seemingly clear look at Intel’s next-gen chip, courtesy of tech leaker momomo_us on X. Despite the picture’s low resolution, we can clearly distinguish the different tiles, six to be exact, likely to be dedicated to compute, graphics, hub/SoC, and peripheral control.
By splitting each functional block into separate tiles, Intel reduces silicon waste due to manufacturing defects, all while reducing cost by manufacturing some tiles on older/cheaper nodes. This also allows it to use third-party fabrication facilities, without being forced to make the entire processor in one place.
This Nova Lake-H CPU is reportedly a 16-core configuration, packing four P-Cores, eight E-Cores, and four LPE-Cores, with 18MB of cache alongside four Xe graphics cores, split between three tiles. Based on what we know about Intel’s designs, the main P-Cores and E-Cores cores are likely to be located inside a dedicated compute tile, using TSMC’s N2P node, with the remaining four LPE-Cores sharing space on the hub/SoC tile, made using Intel’s 18A-P node. The same goes for the four GPU cores, which should receive their own graphics tile, made using Intel’s 3-E node.
The fourth tile is likely to be dedicated to peripheral control, also made on Intel’s 18A-P process, with the remaining two tiles filling the gap using dummy silicon for structural rigidity. Note that the latter could potentially be replaced by active silicon on higher-end models, such as the rumoured Core Ultra 4970H with 12 Xe graphics cores.
Based on previous rumours from Moore’s Law Is Dead on YouTube, the entire chip should measure around 276mm², split into 55mm² for the compute tile, 72mm² for the hub/SoC tile, 26mm² for the graphics tile, 58mm² for the peripheral control tile, 21mm² for the first dummy tile, and 45mm² for the second dummy tile.
This modular approach gives Intel great flexibility when it comes to CPU configuration, allowing it to pack more or fewer CPU and GPU cores into different models without requiring a complete silicon overhaul. Whether these chips will be competitive remains to be seen, but so far, they seem promising.
